Add VHDL Support & Newer Verilog Linters (#2229)

* Added VHDL file support with ghdl compiler
* Update ghdl.vim
* Create vcom.vim
* Create xvhdl.vim
* Update xvlog.vim
* Added documentation for VHDL & Verilog linters
* Added tests to VHDL & Verilog linters

ale_linters/verilog/vlog.vim

@@ -0,0 +1,36 @@
+" Author:      John Gentile <johncgentile17@gmail.com>
+" Description: Adds support for Mentor Graphics Questa/ModelSim `vlog` Verilog compiler/checker
+
+call ale#Set('verilog_vlog_executable', 'vlog')
+" See `$ vlog -h` for more options
+call ale#Set('verilog_vlog_options', '-quiet -lint')
+
+function! ale_linters#verilog#vlog#GetCommand(buffer) abort
+    return '%e ' . ale#Pad(ale#Var(a:buffer, 'verilog_vlog_options')) . ' %t'
+endfunction
+
+function! ale_linters#verilog#vlog#Handle(buffer, lines) abort
+    "Matches patterns like the following:
+    "** Warning: add.v(7): (vlog-2623) Undefined variable: C.
+    "** Error: file.v(1): (vlog-13294) Identifier must be declared with a port mode: C.
+    let l:pattern = '^**\s\(\w*\):[a-zA-Z0-9\-\.\_\/ ]\+(\(\d\+\)):\s\+\(.*\)'
+    let l:output = []
+
+    for l:match in ale#util#GetMatches(a:lines, l:pattern)
+      call add(l:output, {
+      \   'lnum': l:match[2] + 0,
+      \   'type': l:match[1] is? 'Error' ? 'E' : 'W',
+      \   'text': l:match[3],
+      \})
+    endfor
+
+    return l:output
+endfunction
+
+call ale#linter#Define('verilog', {
+\   'name': 'vlog',
+\   'output_stream': 'stdout',
+\   'executable_callback': ale#VarFunc('verilog_vlog_executable'),
+\   'command_callback': 'ale_linters#verilog#vlog#GetCommand',
+\   'callback': 'ale_linters#verilog#vlog#Handle',
+\})

ale_linters/verilog/xvlog.vim

@@ -0,0 +1,35 @@
+" Author:      John Gentile <johncgentile17@gmail.com>
+" Description: Adds support for Xilinx Vivado `xvlog` Verilog compiler/checker
+
+call ale#Set('verilog_xvlog_executable', 'xvlog')
+call ale#Set('verilog_xvlog_options', '')
+
+function! ale_linters#verilog#xvlog#GetCommand(buffer) abort
+    return '%e ' . ale#Pad(ale#Var(a:buffer, 'verilog_xvlog_options')) . ' %t'
+endfunction
+
+function! ale_linters#verilog#xvlog#Handle(buffer, lines) abort
+    "Matches patterns like the following:
+    " ERROR: [VRFC 10-1412] syntax error near output [/path/to/file.v:5]
+    let l:pattern = '^ERROR:\s\+\(\[.*\)\[.*:\([0-9]\+\)\]'
+    let l:output = []
+
+    " NOTE: `xvlog` only prints 'INFO' and 'ERROR' messages
+    for l:match in ale#util#GetMatches(a:lines, l:pattern)
+      call add(l:output, {
+      \   'lnum': l:match[2] + 0,
+      \   'type': 'E',
+      \   'text': l:match[1],
+      \})
+    endfor
+
+    return l:output
+endfunction
+
+call ale#linter#Define('verilog', {
+\   'name': 'xvlog',
+\   'output_stream': 'stdout',
+\   'executable_callback': ale#VarFunc('verilog_xvlog_executable'),
+\   'command_callback': 'ale_linters#verilog#xvlog#GetCommand',
+\   'callback': 'ale_linters#verilog#xvlog#Handle',
+\})

ale_linters/vhdl/ghdl.vim

@@ -0,0 +1,37 @@
+" Author: John Gentile <johncgentile17@gmail.com>
+" Description: Adds support for `ghdl` VHDL compiler/checker
+
+call ale#Set('vhdl_ghdl_executable', 'ghdl')
+" Compile w/VHDL-2008 support
+call ale#Set('vhdl_ghdl_options', '--std=08')
+
+function! ale_linters#vhdl#ghdl#GetCommand(buffer) abort
+   return '%e -s ' . ale#Pad(ale#Var(a:buffer, 'vhdl_ghdl_options')) . ' %t'
+endfunction
+
+function! ale_linters#vhdl#ghdl#Handle(buffer, lines) abort
+    " Look for 'error' lines like the following:
+    " dff_en.vhd:41:5:error: 'begin' is expected instead of 'if'
+    " /path/to/file.vhdl:12:8: no declaration for "i0"
+    let l:pattern = '^[a-zA-Z0-9\-\.\_\/ ]\+:\(\d\+\):\(\d\+\):\(.*\)'
+    let l:output = []
+
+    for l:match in ale#util#GetMatches(a:lines, l:pattern)
+        call add(l:output, {
+        \   'lnum': l:match[1] + 0,
+        \   'col' : l:match[2] + 0,
+        \   'text': l:match[3],
+        \   'type': 'E',
+        \})
+    endfor
+
+    return l:output
+endfunction
+
+call ale#linter#Define('vhdl', {
+\   'name': 'ghdl',
+\   'output_stream': 'stderr',
+\   'executable_callback': ale#VarFunc('vhdl_ghdl_executable'),
+\   'command_callback': 'ale_linters#vhdl#ghdl#GetCommand',
+\   'callback': 'ale_linters#vhdl#ghdl#Handle',
+\})

ale_linters/vhdl/vcom.vim

@@ -0,0 +1,38 @@
+" Author:      John Gentile <johncgentile17@gmail.com>
+" Description: Adds support for Mentor Graphics Questa/ModelSim `vcom` VHDL compiler/checker
+
+call ale#Set('vhdl_vcom_executable', 'vcom')
+" Use VHDL-2008. See `$ vcom -h` for more options
+call ale#Set('vhdl_vcom_options', '-2008 -quiet -lint')
+
+function! ale_linters#vhdl#vcom#GetCommand(buffer) abort
+    return '%e ' . ale#Pad(ale#Var(a:buffer, 'vhdl_vcom_options')) . ' %t'
+endfunction
+
+function! ale_linters#vhdl#vcom#Handle(buffer, lines) abort
+    "Matches patterns like the following:
+    "** Warning: ../path/to/file.vhd(218): (vcom-1236) Shared variables must be of a protected type.
+    "** Error: tb_file.vhd(73): (vcom-1136) Unknown identifier "aresetn".
+    "** Error: tb_file.vhd(73): Bad resolution function (STD_LOGIC) for type (error).
+    "** Error: tb_file.vhd(73): near ":": (vcom-1576) expecting ';' or ')'.
+    let l:pattern = '^**\s\(\w*\):[a-zA-Z0-9\-\.\_\/ ]\+(\(\d\+\)):\s\+\(.*\)'
+    let l:output = []
+
+    for l:match in ale#util#GetMatches(a:lines, l:pattern)
+      call add(l:output, {
+      \   'lnum': l:match[2] + 0,
+      \   'type': l:match[1] is? 'Error' ? 'E' : 'W',
+      \   'text': l:match[3],
+      \})
+    endfor
+
+    return l:output
+endfunction
+
+call ale#linter#Define('vhdl', {
+\   'name': 'vcom',
+\   'output_stream': 'stdout',
+\   'executable_callback': ale#VarFunc('vhdl_vcom_executable'),
+\   'command_callback': 'ale_linters#vhdl#vcom#GetCommand',
+\   'callback': 'ale_linters#vhdl#vcom#Handle',
+\})

ale_linters/vhdl/xvhdl.vim

@@ -0,0 +1,37 @@
+" Author:      John Gentile <johncgentile17@gmail.com>
+" Description: Adds support for Xilinx Vivado `xvhdl` VHDL compiler/checker
+
+call ale#Set('vhdl_xvhdl_executable', 'xvhdl')
+" Use VHDL-2008. See `$ xvhdl -h` for more options
+call ale#Set('vhdl_xvhdl_options', '--2008')
+
+function! ale_linters#vhdl#xvhdl#GetCommand(buffer) abort
+    return '%e ' . ale#Pad(ale#Var(a:buffer, 'vhdl_xvhdl_options')) . ' %t'
+endfunction
+
+function! ale_linters#vhdl#xvhdl#Handle(buffer, lines) abort
+    "Matches patterns like the following:
+    " ERROR: [VRFC 10-91] aresetn is not declared [/path/to/file.vhd:17]
+    " ERROR: [VRFC 10-91] m_axis_tx_tdata is not declared [/home/user/tx_data.vhd:128]
+    let l:pattern = '^ERROR:\s\+\(\[.*\)\[.*:\([0-9]\+\)\]'
+    let l:output = []
+
+    " NOTE: `xvhdl` only prints 'INFO' and 'ERROR' messages
+    for l:match in ale#util#GetMatches(a:lines, l:pattern)
+      call add(l:output, {
+      \   'lnum': l:match[2] + 0,
+      \   'type': 'E',
+      \   'text': l:match[1],
+      \})
+    endfor
+
+    return l:output
+endfunction
+
+call ale#linter#Define('vhdl', {
+\   'name': 'xvhdl',
+\   'output_stream': 'stdout',
+\   'executable_callback': ale#VarFunc('vhdl_xvhdl_executable'),
+\   'command_callback': 'ale_linters#vhdl#xvhdl#GetCommand',
+\   'callback': 'ale_linters#vhdl#xvhdl#Handle',
+\})