Add Yosys linter for Verilog files. (#3713)

* Add yosys for verilog files.

* Add handler test for yosys.

* fix typo in yosys handler test

* fix array order in yosys handler test

* add yosys linter to filetype defaults test

* fix duplicate tag

* add 'yosys' to 'ale-supported-languages-and-tools.txt'

doc/ale-supported-languages-and-tools.txt

@@ -550,6 +550,7 @@ Notes:
   * `verilator`
   * `vlog`
   * `xvlog`
+  * `yosys`
 * VHDL
   * `ghdl`
   * `vcom`